The invention generally relates to a step voltage generator.
Each cell of a multilevel cell (MLC) memory stores multiple bits of data. The cells may be flash cells, each of which is formed from a floating gate transistor. The floating gate transistor has a variable threshold voltage (called “VT”), the level of which is programmed to one of multiple voltage levels for purposes of storing different values in the flash cell.
For example, the VT threshold may be programmed with four possible voltage levels, and thus, may indicate a two bit data value. The value that is programmed in the flash cell may be “read” by applying voltages to the gate terminal of the flash cell and observing the resulting current. Application of the VT threshold voltage to the gate terminal of the floating transistor produces a predictable current called the VT threshold current through the drain-source path of the transistor when the drain terminal of the transistor is set to a predetermined voltage level. For example, assume a VT threshold voltage called “VT1” is programmed into the transistor and indicative of a particular data value. To determine whether this data value is stored by the flash cell, the VT1 voltage may be applied to the gate terminal, and if the VT1 voltage produces the VT threshold current, then the cell stores the particular data value.
Therefore, several different VT threshold voltages may be presented to the gate terminal of a flash cell for purposes of determining the data value that is stored by the cell. Due to the generation of the multiple, non-zero voltage levels, the circuitry that generates these voltage levels may be complex and consume a relatively large die area.
Thus, there is a continuing need for a circuit to generate multiple VT voltage levels for an MLC memory, which is relatively simple in design and consumes a relatively small die area.